1. Field of the Invention
This invention relates to a solid-state image sensor such as an interline CCD image sensor (an interline charge coupled device image sensor) having an anti-blooming structure, in which a vertical CCD register constituting a signal charge transfer area is formed independently from a photoelectric conversion area.
2. Description of the Prior Art
In order to suppress blooming resulting from excess charge based on intense illumination of a photoelectric conversion area, a solid-state image sensor in which the photoelectric conversion area is formed within a p-type layer positioned on an n-type layer, has been proposed by Y. Ishihara, et al., "Interline CCD Image Sensor with an Antiblooming Structure," IEEE Transactions on Electron Devices, vol. ED-31, No. 1, pp. 83-88, January 1984. FIG. 4 shows a unit cell constituting the solid-state image sensor disclosed in the above-mentioned article, wherein an n-type layer 1 which constitutes a photoelectric conversion area is formed as a photodiode on a thin p-type layer 5, while another n-type layer 2 which is positioned at a certain distance from the n-type layer 1 is formed on a thick p-type layer 6 and functions as a buried channel of a vertical CCD register. Both the p-type layers 5 and 6 are positioned on an n-type substrate 7. A reverse bias voltage V.sub.SUB 8 is applied between the p-type layers 5 and 6 and the substrate 7. This unit cell is electrically isolated from adjacent unit cells by channel stops composed of p.sup.+ -layers 3. According to the above-mentioned structure, the thin p-type layer 5 is completely depleted, while the thick p-type layer 6 is not sufficiently depleted (namely, the thick p-type layer 6 has a non-depletive region). On both the n-type layer 2 forming the buried channel and the transfer gate region 9 containing the remaining p-type layer which has not undergone depletion, an insulating film 10 and a polysilicon layer 11 constituting an electrode for the vertical CCD register are successively formed. On the electrode 11, a photo-shielding Al film 12 is formed. Pulses .phi.v are fed to the electrode 11 to drive the vertical CCD register.
FIGS. 5(a) and 5(c), respectively show the potential profiles in the depth of the vertical CCD register area 2 in a section A in FIG. 4 and the depth of the photodiode area 1 in a section C shown in FIG. 4, and FIG. 5(b) shows the potential profile in the horizontal direction of the vertical CCD register area 2, the transfer gate region 9 and the photodiode area 1, respectively.
The pulse .phi.v have three levels, V.sub.H (high), V.sub.M (middle) and V.sub.L (low). A signal charge accumulated in the photodiode area 1 at the time when the pulses .phi.v are at the V.sub.H level is transferred into the vertical CCD register area 2 through the transfer gate region 9, and the potential of the photodiode area 1 reaches an equal level to that of the transfer gate region 9 (See solid lines in FIG. 5(a) and 5(c)).
When the pulses .phi.v are between the V.sub.M and V.sub.L levels, the vertical CCD register area 2 is isolated from the photodiode area 1 by the transfer gate region 9. At that time, the signal charge in the vertical CCD register area 2 is transferred bit by bit during horizontal flyback, while an additional photogenerated signal charge is accumulated into the photodiode area 1. As the photogenerated signal charge is integrated into the photodiode, the photodiode potential decreases. Excess charge generated at the time when intense illumination is attained in the photodiode area 1 is transferred from the photodiode area 1 into the substrate 7, as indicated by the dotted line in FIG. 5(c) illustrating the photodiode potential, resulting in a suppression of blooming.
However, the conventional solid-state image sensor shown in FIG. 4 has the following disadvantages:
Even where the signal charge in the photodiode area 1 is transferred into the vertical CCD register 2 at the time when the pulses .phi.v are at the highest potential V.sub.H, an additional signal charge is successively generated and successively transferred from the photodiode 1 into the vertical CCD register 2, as indicated by the solid arrows in FIGS. 5(b) and 5(c), whtout undergoing accumulation into the photodiode 1. Thus, when intense illumination of the photodiode 1 is attained, the excess charge which is generated in the photodiode 1 and successively transferred into the vertical CCD register 2 overflows in the vertical CCD register 2, causing blooming.